Conventional prior art doped or undoped silicon deposition has been carried out in accordance with a low pressure chemical vapor deposition process (LPCVD). A silicon precursor gas, such as silane, disilane, silicon tetrachloride and the like, which can also include a dopant gas such as phosphine, diborane or arsine, is fed to a chamber containing a substrate on which the silicon layer is to be deposited. The substrate is heated to deposition temperature and the gases fed to the chamber where they are decomposed, whereupon silicon deposits on the surface of the substrate.
These systems are typically run at pressures of about 200 to 400 millitorr; thus the low pressure designation. However, at these pressures the silicon deposition rate is very low, on the order of about 100 angstroms per minute for undoped silicon and only about 30-50 angstroms per minute for doped silicon. The prior art processes have compensated for the low deposition rates by loading a plurality, e.g., up to about 100, of substrates at a time in a chamber to be processed.
In the prior art LPCVD system illustrated in FIG. 1, a chamber 10 includes a boat 11 carrying a plurality of silicon wafers 12. A gas feed from a gas source 13 is controlled by a flow controller 14 and enters the chamber 10 from gas inlet port 15. The gas feed is maintained across the wafers 12 in the direction of the arrows. The low pressure in the chamber 10 is maintained by an exhaust system 16. Because the concentration of the feed gases can decrease as they flow toward the exhaust system 16, the chamber also includes three separately controlled heater elements 17 that provide temperature variations in the chamber 10 to compensate for the variation of concentrations of reactant gases within the chamber 10.
FIG. 2 illustrates another prior art LPCVD batch-type silicon deposition chamber. In this chamber, a plurality of wafers 21 are stacked vertically and the reactant gases are injected through a plurality of holes 23 in a gas injector 22. The gas injector 22 is located between two rows of wafers 21. The low pressure in this chamber again enables sufficient uniformity of deposition that the deposition can be performed in a batch type process.
While careful adjustment of the gas pressures and temperatures can deposit smooth, uniform silicon films onto a substrate in this manner, the disadvantage is that if anything goes wrong during the deposition, e.g., a power outage, impurities in the feed gases or the like, a large batch of wafers is damaged and rendered useless.
Further, more modern semiconductor processing equipment employs multiple chambers for the multiple process steps of preparing devices onto substrates such as silicon, gallium arsenide and the like. Several processes are sequentially performed on a single wafer at one time in a series of interconnected chambers, all under vacuum. This eliminates the need to ramp pressures up and down between process steps which is both costly and exposes the substrates to contaminants in the ambient.
However, since the deposition of silicon in a LPCVD process is slow, the time required for depositing a layer of silicon onto one wafer at a time is unduly long and adds greatly to the costs of producing devices. Further, the silicon deposition step would be a bottleneck in multiple stage process equipment.
Still further, thin film transistors made from amorphous silicon are of increasing interest to the semiconductor industry. Amorphous silicon films used to make thin film transistors desirably contain a minimum number of nucleation sites for grain growth during subsequent annealing steps. This is because when making transistors from amorphous silicon, it is desired that the deposited silicon film imitate crystalline silicon as much as possible; the presence of fewer nucleation sites in the deposited amorphous silicon results in fewer and larger crystal grains in the annealed silicon films, since the grains grow during annealing until they meet an adjacent crystal grain. Thus the fewer the number of nucleation sites present, the larger the grains become during subsequent annealing. When making transistors in such thin films, the larger the grain size, the greater the chance that any one transistor will be built upon a single grain or single crystal.
Thus a process that would improve the throughput of silicon deposition onto single substrates in a multiple stage reactor, and reduce the number of nucleation sites in amorphous silicon thin films, would be highly desirable.